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authorPatrick Georgi <patrick@georgi-clan.de>2014-11-17 09:27:08 +0100
committerPatrick Georgi <pgeorgi@google.com>2014-11-18 08:25:45 +0100
commit68e4cbd9d6c4b7bf88b0f6fc207e75d1528766ad (patch)
tree171ecc6dc394072c63a779d514a1a410b0a84b0a /src/cpu
parent04f68c1cf174b075645500437058862b9a3ba169 (diff)
tegra124: actually parse is_lvds
Precedence rules make the compiler optimize const | var ? val1 : val2; into val1. In our case this means not writing 2 << NV_SOR_CSTM_ROTCLK_SHIFT to the register and not caring about the content of is_lvds. Change-Id: I0b02c74f9445f51bfab9eeae2e8eb9480d104708 Found-by: Coverity Scan Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: http://review.coreboot.org/7501 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins)
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