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authorEric Biederman <ebiederm@xmission.com>2003-07-01 06:51:27 +0000
committerEric Biederman <ebiederm@xmission.com>2003-07-01 06:51:27 +0000
commit57fa1b8279d78b3083b086708d857422ed99beca (patch)
treea6f2e83cae06715d95b8f38cb5a5f009824579d0 /src/cpu
parentc22ea4f00d4a0f12c8d31a36fe9853cb18c62c9c (diff)
- Code to enable and disable use of the sse and mmx registers
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@930 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/k8/disable_mmx_sse.inc27
-rw-r--r--src/cpu/k8/enable_mmx_sse.inc14
2 files changed, 41 insertions, 0 deletions
diff --git a/src/cpu/k8/disable_mmx_sse.inc b/src/cpu/k8/disable_mmx_sse.inc
new file mode 100644
index 0000000000..5ce9dfdc1f
--- /dev/null
+++ b/src/cpu/k8/disable_mmx_sse.inc
@@ -0,0 +1,27 @@
+ /* Clear out an mmx state */
+ emms
+
+ /*
+ * Put the processor back into a reset state
+ * with respect to the xmm registers.
+ */
+
+ pxor %xmm0, %xmm0
+ pxor %xmm1, %xmm1
+ pxor %xmm2, %xmm2
+ pxor %xmm3, %xmm3
+ pxor %xmm4, %xmm4
+ pxor %xmm5, %xmm5
+ pxor %xmm6, %xmm6
+ pxor %xmm7, %xmm7
+
+ /* Disable floating point emulation */
+ movl %cr0, %eax
+ andl $~(1<<2), %eax
+ movl %eax, %cr0
+
+ /* Disable sse instructions */
+ movl %cr4, %eax
+ andl $~(3<<9), %eax
+ movl %eax, %cr4
+
diff --git a/src/cpu/k8/enable_mmx_sse.inc b/src/cpu/k8/enable_mmx_sse.inc
new file mode 100644
index 0000000000..5551525d68
--- /dev/null
+++ b/src/cpu/k8/enable_mmx_sse.inc
@@ -0,0 +1,14 @@
+ /*
+ * Enabling mmx registers is a noop
+ * Enable the use of the xmm registers
+ */
+
+ /* Disable floating point emulation */
+ movl %cr0, %eax
+ andl $~(1<<2), %eax
+ movl %eax, %cr0
+
+ /* Enable sse instructions */
+ movl %cr4, %eax
+ orl $(1<<9), %eax
+ movl %eax, %cr4