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authorArthur Heymans <arthur@aheymans.xyz>2020-12-24 12:03:32 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-01-08 08:08:07 +0000
commit17c951b2c42790adf96eb13c112d70de4df7ce40 (patch)
treedee8bb23c464557f8cdc7d7ad8d21703f0c2a80c /src/cpu
parent51d23c589bc5b1478765a324d3e807f2f8fd40c2 (diff)
*/Makefile.inc: Add some INTERMEDIATE targets to .PHONY
Change-Id: I125e40204f3a9602ee5810d341ef40f9f50d045b Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48897 Reviewed-by: Idwer Vollering <vidwer@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/intel/fit/Makefile.inc2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/cpu/intel/fit/Makefile.inc b/src/cpu/intel/fit/Makefile.inc
index 98666843e9..20483d8203 100644
--- a/src/cpu/intel/fit/Makefile.inc
+++ b/src/cpu/intel/fit/Makefile.inc
@@ -6,6 +6,7 @@ ifneq ($(CONFIG_UPDATE_IMAGE),y) # never update the bootblock
ifneq ($(CONFIG_CPU_MICROCODE_CBFS_NONE),y)
+PHONY+=add_mcu_fit
INTERMEDIATE+=add_mcu_fit
add_mcu_fit: $(obj)/coreboot.pre $(IFITTOOL)
@printf " UPDATE-FIT Microcode\n"
@@ -14,6 +15,7 @@ add_mcu_fit: $(obj)/coreboot.pre $(IFITTOOL)
# Second FIT in TOP_SWAP bootblock
ifeq ($(CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK),y)
+PHONY+=add_ts_mcu_fit
INTERMEDIATE+=add_ts_mcu_fit
add_ts_mcu_fit: $(obj)/coreboot.pre $(IFITTOOL)
@printf " UPDATE-FIT Top Swap: Microcode\n"