diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-01 20:29:14 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-08 04:50:33 +0000 |
| commit | 0a4457ff44b10f22b711f64e88888c757fbedf32 (patch) | |
| tree | 3e5511bb1e05dfdc34a28533782fb0230bc490a1 /src/cpu | |
| parent | cccb815c5e4d908db9a668643eda241a740923f2 (diff) | |
lib/stage_cache: Refactor Kconfig options
Add explicit CBMEM_STAGE_CACHE option. Rename
CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM to TSEG_STAGE_CACHE.
Platforms with SMM_TSEG=y always need to implement
stage_cache_external_region(). It is allowed to return with a
region of size 0 to effectively disable the cache.
There are no provisions in Kconfig to degrade from
TSEG_STAGE_CACHE to CBMEM_STAGE_CACHE.
As a security measure CBMEM_STAGE_CACHE default is changed to
disabled. AGESA platforms without TSEG will experience slower
S3 resume speed unless they explicitly select the option.
Change-Id: Ibbdc701ea85b5a3208ca4e98c428b05b6d4e5340
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34664
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/intel/model_2065x/Kconfig | 1 | ||||
| -rw-r--r-- | src/cpu/intel/model_206ax/Kconfig | 1 | ||||
| -rw-r--r-- | src/cpu/intel/smm/gen1/smmrelocate.c | 2 |
3 files changed, 1 insertions, 3 deletions
diff --git a/src/cpu/intel/model_2065x/Kconfig b/src/cpu/intel/model_2065x/Kconfig index 089b3fead0..a3a58b65e6 100644 --- a/src/cpu/intel/model_2065x/Kconfig +++ b/src/cpu/intel/model_2065x/Kconfig @@ -21,7 +21,6 @@ config CPU_SPECIFIC_OPTIONS select CPU_INTEL_COMMON select NO_FIXED_XIP_ROM_SIZE select PARALLEL_MP - select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM config BOOTBLOCK_CPU_INIT string diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index 2af63d6079..ced3340903 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -19,7 +19,6 @@ config CPU_SPECIFIC_OPTIONS #select AP_IN_SIPI_WAIT select TSC_SYNC_MFENCE select CPU_INTEL_COMMON - select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM select PARALLEL_MP select NO_FIXED_XIP_ROM_SIZE diff --git a/src/cpu/intel/smm/gen1/smmrelocate.c b/src/cpu/intel/smm/gen1/smmrelocate.c index 986929c9cb..d8021e6ac2 100644 --- a/src/cpu/intel/smm/gen1/smmrelocate.c +++ b/src/cpu/intel/smm/gen1/smmrelocate.c @@ -121,7 +121,7 @@ static void fill_in_relocation_params(struct smm_relocation_params *params) } /* Adjust available SMM handler memory size. */ - if (CONFIG(CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM)) { + if (CONFIG(TSEG_STAGE_CACHE)) { ASSERT(params->smram_size > CONFIG_SMM_RESERVED_SIZE); params->smram_size -= CONFIG_SMM_RESERVED_SIZE; } |