diff options
| author | David Hendricks <dhendrix@chromium.org> | 2013-04-08 20:01:18 -0700 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-04-10 00:04:57 +0200 |
| commit | 086b369dfc6421c698cd5a386e75fde68cb838dc (patch) | |
| tree | b3378f616868263db406e88dab109381e0e950e7 /src/cpu | |
| parent | b959fbb87adb274b442bc6ab812e5a2ce92ca220 (diff) | |
armv7: replace read/write macros with inlines
This enables type checking for safety as to help prevent errors like
http://review.coreboot.org/#/c/3038/ . Now compilation fails if the
wrong type is passed into readb/readw/readl/writeb/writew/writel
or other macros in io.h.
This also deprecates readw/writew. The previous definition was 16-bits
which is incorrect since wordsize on ARMv7 is 32-bits and there was
only 1 instance of writew (#if 0'd anyway). Going forward we should
always use read{8,16,32} and write{8,16,32} where N specifies the
exact length rather than relying on ambiguous definition of wordsize.
Since many macros relied on __raw_*, which were basically the same
(minus data memory barrier instructions), this patch also gets rid
of __raw_*. There were parts of the code which ended up using these
macros consecutively, for example:
setbits_le32(®s->ch_cfg, SPI_CH_RST);
clrbits_le32(®s->ch_cfg, SPI_CH_RST);
In such cases the safe versions of readl() and writel() should be
used anyway.
Note: This also fixes two dubious casts as to avoid breaking
compilation.
Change-Id: I8850933f68ea3a9b615d00ebd422f7c242268f1c
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/3045
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/samsung/exynos5-common/cpu_info.c | 2 | ||||
| -rw-r--r-- | src/cpu/samsung/exynos5250/clock.c | 6 | ||||
| -rw-r--r-- | src/cpu/samsung/exynos5250/uart.c | 2 |
3 files changed, 5 insertions, 5 deletions
diff --git a/src/cpu/samsung/exynos5-common/cpu_info.c b/src/cpu/samsung/exynos5-common/cpu_info.c index dec3c779aa..6b75473656 100644 --- a/src/cpu/samsung/exynos5-common/cpu_info.c +++ b/src/cpu/samsung/exynos5-common/cpu_info.c @@ -65,7 +65,7 @@ int s5p_get_cpu_rev(void) void s5p_set_cpu_id(void) { - s5p_cpu_id = readl(EXYNOS_PRO_ID); + s5p_cpu_id = readl((void *)EXYNOS_PRO_ID); s5p_cpu_id = (0xC000 | ((s5p_cpu_id & 0x00FFF000) >> 12)); /* diff --git a/src/cpu/samsung/exynos5250/clock.c b/src/cpu/samsung/exynos5250/clock.c index 6b7927287f..3622e28351 100644 --- a/src/cpu/samsung/exynos5250/clock.c +++ b/src/cpu/samsung/exynos5250/clock.c @@ -379,7 +379,7 @@ void set_mmc_clk(int dev_index, unsigned int div) { struct exynos5_clock *clk = samsung_get_base_clock(); - unsigned int addr; + unsigned int *addr; unsigned int val; /* @@ -389,9 +389,9 @@ void set_mmc_clk(int dev_index, unsigned int div) * MMC2_PRE_RATIO [15:8], MMC3_PRE_RATIO [31:24] */ if (dev_index < 2) { - addr = (unsigned int)&clk->div_fsys1; + addr = &clk->div_fsys1; } else { - addr = (unsigned int)&clk->div_fsys2; + addr = &clk->div_fsys2; dev_index -= 2; } diff --git a/src/cpu/samsung/exynos5250/uart.c b/src/cpu/samsung/exynos5250/uart.c index 75c576332f..34d8e08e3b 100644 --- a/src/cpu/samsung/exynos5250/uart.c +++ b/src/cpu/samsung/exynos5250/uart.c @@ -106,7 +106,7 @@ static void serial_setbrg_dev(void) */ #if 0 if (s5p_uart_divslot()) - writew(udivslot[val % 16], &uart->rest.slot); + writel(udivslot[val % 16], &uart->rest.slot); else writeb(val % 16, &uart->rest.value); #endif |