diff options
author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-07-16 19:03:55 +1000 |
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committer | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-07-17 02:20:12 +0200 |
commit | dc112e3515647f17b92ce5205041e03dd53096ef (patch) | |
tree | 3479298f7e1479f65521e2762fe53a261b4c6d29 /src/cpu/x86 | |
parent | 29794b7ad744ea8b2a8b91e2e31a90c599971f5b (diff) |
cpu,Makefile.inc: Trivial - drop trailing blank lines at EOF
Change-Id: I7e8866d76d7f286e10160d7dc4f21f01a913bfee
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6286
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
Diffstat (limited to 'src/cpu/x86')
-rw-r--r-- | src/cpu/x86/name/Makefile.inc | 1 | ||||
-rw-r--r-- | src/cpu/x86/tsc/Makefile.inc | 1 |
2 files changed, 0 insertions, 2 deletions
diff --git a/src/cpu/x86/name/Makefile.inc b/src/cpu/x86/name/Makefile.inc index b22c5ead6c..c208e96fef 100644 --- a/src/cpu/x86/name/Makefile.inc +++ b/src/cpu/x86/name/Makefile.inc @@ -18,4 +18,3 @@ ## ramstage-y += name.c - diff --git a/src/cpu/x86/tsc/Makefile.inc b/src/cpu/x86/tsc/Makefile.inc index 3bbae847f8..600f3131b7 100644 --- a/src/cpu/x86/tsc/Makefile.inc +++ b/src/cpu/x86/tsc/Makefile.inc @@ -3,4 +3,3 @@ romstage-$(CONFIG_TSC_CONSTANT_RATE) += delay_tsc.c ifeq ($(CONFIG_HAVE_SMI_HANDLER),y) smm-$(CONFIG_TSC_CONSTANT_RATE) += delay_tsc.c endif - |