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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-03 23:18:01 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-08 04:51:32 +0000
commit9970b61ad3049d87650cd7b4eb5f47d667098186 (patch)
tree912ee2624ebd4d9c68ab62cbde170c1e5d114b0f /src/cpu/x86
parent0a4457ff44b10f22b711f64e88888c757fbedf32 (diff)
arch/x86: Move TSEG_STAGE_CACHE implementation
This is declared weak so that platforms that do not have smm_subregion() can provide their own implementation. Change-Id: Ide815b45cbc21a295b8e58434644e82920e84e31 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34704 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/cpu/x86')
-rw-r--r--src/cpu/x86/smm/Makefile.inc4
-rw-r--r--src/cpu/x86/smm/stage_cache.c33
2 files changed, 37 insertions, 0 deletions
diff --git a/src/cpu/x86/smm/Makefile.inc b/src/cpu/x86/smm/Makefile.inc
index 5c7aab3ffc..fe149f140f 100644
--- a/src/cpu/x86/smm/Makefile.inc
+++ b/src/cpu/x86/smm/Makefile.inc
@@ -42,6 +42,10 @@ endif
ifeq ($(CONFIG_SMM_TSEG),y)
+ramstage-y += stage_cache.c
+romstage-y += stage_cache.c
+postcar-y += stage_cache.c
+
smmstub-y += smm_stub.S
smm-y += smm_module_handler.c
diff --git a/src/cpu/x86/smm/stage_cache.c b/src/cpu/x86/smm/stage_cache.c
new file mode 100644
index 0000000000..7806290d5c
--- /dev/null
+++ b/src/cpu/x86/smm/stage_cache.c
@@ -0,0 +1,33 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2013 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <console/console.h>
+#include <cpu/x86/smm.h>
+#include <stage_cache.h>
+#include <types.h>
+
+int __weak smm_subregion(int sub, void **base, size_t *size)
+{
+ return -1;
+}
+
+void __weak stage_cache_external_region(void **base, size_t *size)
+{
+ if (smm_subregion(SMM_SUBREGION_CACHE, base, size)) {
+ printk(BIOS_ERR, "ERROR: No cache SMM subregion.\n");
+ *base = NULL;
+ *size = 0;
+ }
+}