diff options
| author | Gang Chen <gang.c.chen@intel.com> | 2024-06-18 06:39:12 +0800 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2024-11-14 14:29:23 +0000 |
| commit | 3d32f915a9c4d60046574690db966d1f14eebe65 (patch) | |
| tree | 79cb2533cca5fb7fa593bc77ac23b5873268eba2 /src/cpu/x86 | |
| parent | 97412d1929e88a929f73a229e40ca85a38168d7e (diff) | |
soc/intel/xeon_sp: Reserve PRMRR
PRMRR (Protected Region Memory Range Region) are not accessible as
normal DRAM regions and needs to be explicitly reserved in memory
map.
Change-Id: I81d17b1376459510f7c0d43ba4b519b1f2bd3e1f
Signed-off-by: Gang Chen <gang.c.chen@intel.com>
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Signed-off-by: Jincheng Li <jincheng.li@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84314
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/cpu/x86')
| -rw-r--r-- | src/cpu/x86/mtrr/mtrr.c | 16 |
1 files changed, 0 insertions, 16 deletions
diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c index f3a9025d53..64ab8294f5 100644 --- a/src/cpu/x86/mtrr/mtrr.c +++ b/src/cpu/x86/mtrr/mtrr.c @@ -97,22 +97,6 @@ static void enable_var_mtrr(unsigned char deftype) wrmsr(MTRR_DEF_TYPE_MSR, msr); } -#define MTRR_VERBOSE_LEVEL BIOS_NEVER - -/* MTRRs are at a 4KiB granularity. */ -#define RANGE_SHIFT 12 -#define ADDR_SHIFT_TO_RANGE_SHIFT(x) \ - (((x) > RANGE_SHIFT) ? ((x) - RANGE_SHIFT) : RANGE_SHIFT) -#define PHYS_TO_RANGE_ADDR(x) ((x) >> RANGE_SHIFT) -#define RANGE_TO_PHYS_ADDR(x) (((resource_t)(x)) << RANGE_SHIFT) - -/* Helpful constants. */ -#define RANGE_1MB PHYS_TO_RANGE_ADDR(1ULL << 20) -#define RANGE_4GB (1ULL << (ADDR_SHIFT_TO_RANGE_SHIFT(32))) - -#define MTRR_ALGO_SHIFT (8) -#define MTRR_TAG_MASK ((1 << MTRR_ALGO_SHIFT) - 1) - static inline uint64_t range_entry_base_mtrr_addr(struct range_entry *r) { return PHYS_TO_RANGE_ADDR(range_entry_base(r)); |