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authorSubrata Banik <subrata.banik@intel.com>2020-09-24 13:50:56 +0530
committerSubrata Banik <subrata.banik@intel.com>2020-09-27 03:01:31 +0000
commit8c0dda218391afb95444d180333e552ba347aba7 (patch)
tree709a05f8668d8e0d87a04462bc6d8c30af16ca47 /src/cpu/x86/pae
parent1bfb74c14c91de5b745c8b8d6f0aabf8fb9ed008 (diff)
soc/intel/cannonlake: Align gpio_op.asl with TGL
Also drop gpio_common.h in favor of intelblocks/gpio_defs.h macros. TEST=Able to build and boot CNL and CML platform. 1) Dump and disassemble DSDT, verify unified methods like GRXS, GTXS etc. are there. 2) Verify no ACPI error seen while running 'dmesg' from console. 3) abuild --timeless to ensure there are no other functional changes. Change-Id: I78d712eeba56b9c098dc6a6f11e4e51cb2529b10 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45654 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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