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authorMartin Roth <martin.roth@se-eng.com>2013-07-08 16:23:54 -0600
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-07-11 22:36:59 +0200
commit4c3ab7376ebb2e3e18919f1ab663d317dfec9b9c (patch)
tree6bd8440a05f6ea1184c0a5500d43cc92ab683f01 /src/cpu/x86/mtrr/earlymtrr.c
parent0cb07e3476d9408d0935253f9f26c0a8ddc28401 (diff)
cpu: Fix spelling
Change-Id: I69c46648de0689e9bed84c7726906024ad65e769 Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/3729 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu/x86/mtrr/earlymtrr.c')
-rw-r--r--src/cpu/x86/mtrr/earlymtrr.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/x86/mtrr/earlymtrr.c b/src/cpu/x86/mtrr/earlymtrr.c
index 55dbd2f4a4..f16da279c6 100644
--- a/src/cpu/x86/mtrr/earlymtrr.c
+++ b/src/cpu/x86/mtrr/earlymtrr.c
@@ -32,7 +32,7 @@ static void cache_ramstage(void)
const int addr_det = 0;
/* the fixed and variable MTTRs are power-up with random values,
- * clear them to MTRR_TYPE_UNCACHEABLE for safty.
+ * clear them to MTRR_TYPE_UNCACHEABLE for safety.
*/
static void do_early_mtrr_init(const unsigned long *mtrr_msrs)
{
@@ -43,7 +43,7 @@ static void do_early_mtrr_init(const unsigned long *mtrr_msrs)
msr_t msr;
const unsigned long *msr_addr;
- /* Inialize all of the relevant msrs to 0 */
+ /* Initialize all of the relevant msrs to 0 */
msr.lo = 0;
msr.hi = 0;
unsigned long msr_nr;