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authorNico Huber <nico.h@gmx.de>2017-10-02 20:07:53 +0200
committerNico Huber <nico.h@gmx.de>2017-10-03 19:48:01 +0000
commitca3e121607d7cc04dd1da7b2e40d7a4d9fa039bb (patch)
tree8b044fccb9d0c24fbd0b5395808375970c354a0b /src/cpu/x86/lapic/secondary.S
parent29922a540922550b80ba76a821c85eae328899cc (diff)
nb/intel/gm45: Remove UMA alignment optimization
This code path was only triggered in one corner case: GFX UMA set to 48MiB. It created a hole below UMA to save MTRRs. But, this hole was never accounted for when calculating cbmem_top(). Instead of trying to fix it, remove it, it's not worth the trouble. TEST=Booted lenovo/x200 with all available CMOS gfx_uma_size settings. Change-Id: I3f4ceec4224d86113be9bfa3ce4759bed584640d Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/21847 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/cpu/x86/lapic/secondary.S')
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