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authorXiang Wang <wxjstz@126.com>2018-10-11 17:42:49 +0800
committerPatrick Georgi <pgeorgi@google.com>2018-11-05 09:03:50 +0000
commit26f725efc235b282e20aa678f8e683a014920b71 (patch)
tree3cab86c6a9218f727e321fcd93fb126a26097089 /src/cpu/qemu-power8
parent7c9540ea1d46a776ec92b58f99074f51b430f9bb (diff)
riscv: add support to block smp in each stage
Each stage performs some basic initialization (stack, HLS etc) and then call smp_pause to enter the single-threaded state. The main work of each stage is executed in a single-threaded state, and the multi-threaded state is restored by call smp_resume while booting the next stage. Change-Id: I8d508c3d0f65a022010e74f8edad7ad2cfdc7dee Signed-off-by: Xiang Wang <wxjstz@126.com> Reviewed-on: https://review.coreboot.org/29024 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Philipp Hug <philipp@hug.cx>
Diffstat (limited to 'src/cpu/qemu-power8')
0 files changed, 0 insertions, 0 deletions