diff options
| author | Yinghai Lu <yinghailu@gmail.com> | 2004-07-01 03:55:03 +0000 |
|---|---|---|
| committer | Yinghai Lu <yinghailu@gmail.com> | 2004-07-01 03:55:03 +0000 |
| commit | 70093f7875371abe52c4417c6cc3a427d20781c5 (patch) | |
| tree | f5812172eab817e66840583c669f16d4b1121531 /src/cpu/p6/disable_mmx_sse.inc | |
| parent | 7dea9552d5fa10c5542e744fe1d8e0a81689e3c1 (diff) | |
Intel E7501 P64H2 ICH5R support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1616 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/p6/disable_mmx_sse.inc')
| -rw-r--r-- | src/cpu/p6/disable_mmx_sse.inc | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/src/cpu/p6/disable_mmx_sse.inc b/src/cpu/p6/disable_mmx_sse.inc new file mode 100644 index 0000000000..5ce9dfdc1f --- /dev/null +++ b/src/cpu/p6/disable_mmx_sse.inc @@ -0,0 +1,27 @@ + /* Clear out an mmx state */ + emms + + /* + * Put the processor back into a reset state + * with respect to the xmm registers. + */ + + pxor %xmm0, %xmm0 + pxor %xmm1, %xmm1 + pxor %xmm2, %xmm2 + pxor %xmm3, %xmm3 + pxor %xmm4, %xmm4 + pxor %xmm5, %xmm5 + pxor %xmm6, %xmm6 + pxor %xmm7, %xmm7 + + /* Disable floating point emulation */ + movl %cr0, %eax + andl $~(1<<2), %eax + movl %eax, %cr0 + + /* Disable sse instructions */ + movl %cr4, %eax + andl $~(3<<9), %eax + movl %eax, %cr4 + |