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authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-10-16 13:35:04 +0300
committerFelix Held <felix-coreboot@felixheld.de>2021-10-18 12:28:53 +0000
commit5f4ae427edaef5e6c7dd2f22b574041d9d5dcb36 (patch)
tree033e5082194bb54c8e7b6c21e337809743e23037 /src/cpu/intel
parentb31b033ccc50a2f5c609f5fd2cbfda588994b518 (diff)
cpu/intel/hyperthreading: Use CPUID leaf 0xb without X2APIC
It is not a requirement to have X2APIC mode enabled to use CPUID leaf 0xb EDX to detect logical CPU is a hyperthreading sibling. Change-Id: I288f2df5a392c396f92bb6d18908df35de55915d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58383 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/cpu/intel')
-rw-r--r--src/cpu/intel/common/hyperthreading.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/src/cpu/intel/common/hyperthreading.c b/src/cpu/intel/common/hyperthreading.c
index b9c17b6fa1..2936770cc3 100644
--- a/src/cpu/intel/common/hyperthreading.c
+++ b/src/cpu/intel/common/hyperthreading.c
@@ -23,12 +23,10 @@ bool intel_ht_sibling(void)
if (!intel_ht_supported())
return false;
- if (is_x2apic_mode()) {
- if (cpuid_eax(0) >= 0xb) {
- result = cpuid_ext(0xb, 0);
- const uint32_t div = 1 << (result.eax & 0x1f);
- return result.edx % div > 0;
- }
+ if (cpuid_eax(0) >= 0xb) {
+ result = cpuid_ext(0xb, 0);
+ const uint32_t div = 1 << (result.eax & 0x1f);
+ return result.edx % div > 0;
}
apic_ids = 1;