diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-07-06 09:51:58 +0300 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2019-07-13 17:56:32 +0000 |
commit | 3b50c05bb203dc8f302881be38c7566917b34e0e (patch) | |
tree | 0453678fec5792926711a50237696f94fa7aa5a1 /src/cpu/intel | |
parent | 8b9a3ec93a5b941b62bac3f4176d05dc3f45bd55 (diff) |
intel/haswell: Replace monotonic timer
Remove implementation of 24 MHz clock, available only
on Haswell ULT SKUs. Use TSC_MONOTONIC_TIMER instead
for all boards.
Change-Id: Ic4aeb084d1b0913368f5eaa46e1bd68411435517
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34114
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/cpu/intel')
-rw-r--r-- | src/cpu/intel/haswell/Kconfig | 1 | ||||
-rw-r--r-- | src/cpu/intel/haswell/Makefile.inc | 8 | ||||
-rw-r--r-- | src/cpu/intel/haswell/monotonic_timer.c | 58 |
3 files changed, 1 insertions, 66 deletions
diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig index cb8bc77335..8f91b60953 100644 --- a/src/cpu/intel/haswell/Kconfig +++ b/src/cpu/intel/haswell/Kconfig @@ -15,6 +15,7 @@ config CPU_SPECIFIC_OPTIONS select SSE2 select UDELAY_TSC select TSC_CONSTANT_RATE + select TSC_MONOTONIC_TIMER select SUPPORT_CPU_UCODE_IN_CBFS #select AP_IN_SIPI_WAIT select TSC_SYNC_MFENCE diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc index a472da2d5e..f9606486c2 100644 --- a/src/cpu/intel/haswell/Makefile.inc +++ b/src/cpu/intel/haswell/Makefile.inc @@ -16,14 +16,6 @@ postcar-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c smm-y += finalize.c smm-y += tsc_freq.c -ifneq ($(CONFIG_TSC_MONOTONIC_TIMER),y) -bootblock-y += monotonic_timer.c -romstage-y += monotonic_timer.c -postcar-y += monotonic_timer.c -ramstage-y += monotonic_timer.c -smm-y += monotonic_timer.c -endif - bootblock-y += ../car/non-evict/cache_as_ram.S bootblock-y += ../car/bootblock.c bootblock-y += ../../x86/early_reset.S diff --git a/src/cpu/intel/haswell/monotonic_timer.c b/src/cpu/intel/haswell/monotonic_timer.c deleted file mode 100644 index 63500a4d26..0000000000 --- a/src/cpu/intel/haswell/monotonic_timer.c +++ /dev/null @@ -1,58 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2013 Google, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -#include <stdint.h> -#include <cpu/x86/msr.h> -#include <timer.h> - -#define MSR_COUNTER_24_MHz 0x637 -static struct monotonic_counter { - int initialized; - struct mono_time time; - uint32_t last_value; -} mono_counter; - -static inline uint32_t read_counter_msr(void) -{ - /* Even though the MSR is 64-bit it is assumed that the hardware - * is polled frequently enough to only use the lower 32-bits. */ - msr_t counter_msr; - - counter_msr = rdmsr(MSR_COUNTER_24_MHz); - - return counter_msr.lo; -} - -void timer_monotonic_get(struct mono_time *mt) -{ - uint32_t current_tick; - uint32_t usecs_elapsed; - - if (!mono_counter.initialized) { - mono_counter.last_value = read_counter_msr(); - mono_counter.initialized = 1; - } - - current_tick = read_counter_msr(); - usecs_elapsed = (current_tick - mono_counter.last_value) / 24; - - /* Update current time and tick values only if a full tick occurred. */ - if (usecs_elapsed) { - mono_time_add_usecs(&mono_counter.time, usecs_elapsed); - mono_counter.last_value = current_tick; - } - - /* Save result. */ - *mt = mono_counter.time; -} |