summaryrefslogtreecommitdiff
path: root/src/cpu/intel
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2016-06-17 11:04:37 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2016-06-18 20:02:26 +0200
commite325b223a2c48d35dedce1c20d055c23b0ea4bea (patch)
treeb2e84bc8d2b9c647a9233bef85c82e370d5e6a40 /src/cpu/intel
parent5276941c8b9a3294fda4eb5d102c8333688d29a5 (diff)
intel: Fix romstage main() with asmlinkage
Backport from haswell. Change-Id: I585639f8af47bd1d8c606789ca026c6d2d0cc785 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/15225 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/cpu/intel')
-rw-r--r--src/cpu/intel/car/romstage.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/cpu/intel/car/romstage.c b/src/cpu/intel/car/romstage.c
new file mode 100644
index 0000000000..c6df446c6a
--- /dev/null
+++ b/src/cpu/intel/car/romstage.c
@@ -0,0 +1,7 @@
+#include <cpu/intel/romstage.h>
+
+void * asmlinkage romstage_main(unsigned long bist)
+{
+ mainboard_romstage_entry(bist);
+ return (void*)CONFIG_RAMTOP;
+}