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authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-05-29 21:54:26 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2021-06-07 21:03:55 +0000
commit3ab6157edec3a97945cae93320da809c243843b0 (patch)
treeab6ab2008854c4024883f935b16581e1f9007392 /src/cpu/intel/socket_p
parent34806cce60002a4f06b8724d79d2558385988e98 (diff)
cpu/intel/hyperthreading: Build only for selected models
Implements intel_sibling_init() that is mostly superseded. Change-Id: I4956493d8c0c6b922343e060d2d2bd0ec20f5bb6 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55201 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/intel/socket_p')
-rw-r--r--src/cpu/intel/socket_p/Makefile.inc1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/cpu/intel/socket_p/Makefile.inc b/src/cpu/intel/socket_p/Makefile.inc
index 8e3cb2cee8..4156052a33 100644
--- a/src/cpu/intel/socket_p/Makefile.inc
+++ b/src/cpu/intel/socket_p/Makefile.inc
@@ -5,7 +5,6 @@ subdirs-y += ../../x86/mtrr
subdirs-y += ../../x86/lapic
subdirs-y += ../../x86/cache
subdirs-y += ../microcode
-subdirs-y += ../hyperthreading
subdirs-y += ../speedstep
bootblock-y += ../car/core2/cache_as_ram.S