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authorStefan Tauner <stefan.tauner@gmx.at>2012-10-13 13:15:04 +0200
committerPatrick Georgi <patrick@georgi-clan.de>2012-10-30 17:55:57 +0100
commitbef3d347e8a21049d72407246a5d4ec1339b5601 (patch)
treecb2205e3d87de70300fc336e146082d8e5200f42 /src/cpu/intel/socket_LGA775/Kconfig
parent335450d0a1f7befe4ca649d7e23dcf8ed15bf314 (diff)
Add support for socket LGA775
Change-Id: Ia7ef3a4cbc3638a9c9a48b297e392e4e655b6e6b Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at> Reviewed-on: http://review.coreboot.org/1581 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/cpu/intel/socket_LGA775/Kconfig')
-rw-r--r--src/cpu/intel/socket_LGA775/Kconfig28
1 files changed, 28 insertions, 0 deletions
diff --git a/src/cpu/intel/socket_LGA775/Kconfig b/src/cpu/intel/socket_LGA775/Kconfig
new file mode 100644
index 0000000000..dfb3181096
--- /dev/null
+++ b/src/cpu/intel/socket_LGA775/Kconfig
@@ -0,0 +1,28 @@
+config CPU_INTEL_SOCKET_LGA775
+ bool
+
+if CPU_INTEL_SOCKET_LGA775
+
+config SOCKET_SPECIFIC_OPTIONS # dummy
+ def_bool y
+ select CPU_INTEL_MODEL_6EX
+ select CPU_INTEL_MODEL_6FX
+ select CPU_INTEL_MODEL_F3X
+ select CPU_INTEL_MODEL_F4X
+# select CPU_INTEL_MODEL_F6X
+# select CPU_INTEL_MODEL_1066X
+ select CPU_INTEL_MODEL_1067X
+ select MMX
+ select SSE
+ select UDELAY_TSC
+ select SIPI_VECTOR_IN_ROM
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x4000 # 16 kB
+
+config DCACHE_RAM_BASE
+ hex
+ default 0xfeffc000 # 4GB - 16MB - DCACHE_RAM_SIZE
+
+endif # CPU_INTEL_SOCKET_LGA775