diff options
| author | Elyes Haouas <ehaouas@noos.fr> | 2023-07-21 07:38:54 +0200 |
|---|---|---|
| committer | Elyes Haouas <ehaouas@noos.fr> | 2023-08-04 03:00:25 +0000 |
| commit | 86f4f2fb34aa4a25f79ebca59b3cd6eea3e89c72 (patch) | |
| tree | 110a54d6ecfc9ffc83fa18eb207ed239f9dcafa1 /src/cpu/intel/socket_FCBGA559 | |
| parent | 33201ab49f8a37d8a7a06d7c1c88b4bc243545d6 (diff) | |
cpu: Get rid of CPU_SPECIFIC_OPTIONS
Remove dummy CPU_SPECIFIC_OPTIONS.
Change-Id: I267b2a7c6dfc887b572e1b63b0f59fbfa4d20f0e
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76681
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/intel/socket_FCBGA559')
| -rw-r--r-- | src/cpu/intel/socket_FCBGA559/Kconfig | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/src/cpu/intel/socket_FCBGA559/Kconfig b/src/cpu/intel/socket_FCBGA559/Kconfig index 9f1fbbbdfc..223f80d228 100644 --- a/src/cpu/intel/socket_FCBGA559/Kconfig +++ b/src/cpu/intel/socket_FCBGA559/Kconfig @@ -1,15 +1,12 @@ config CPU_INTEL_SOCKET_FCBGA559 bool + select CPU_INTEL_MODEL_106CX + select CPU_HAS_L2_ENABLE_MSR help Select this socket on Intel Pineview if CPU_INTEL_SOCKET_FCBGA559 -config SOCKET_SPECIFIC_OPTIONS - def_bool y - select CPU_INTEL_MODEL_106CX - select CPU_HAS_L2_ENABLE_MSR - config DCACHE_RAM_BASE hex default 0xfefc0000 |