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author | Angel Pons <th3fanbus@gmail.com> | 2020-10-09 20:55:56 +0200 |
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committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-10-13 10:32:12 +0000 |
commit | d89d0860451f2e2f6c4dc1db57f75e60d5cb2add (patch) | |
tree | f6f3b05330e2491a534c8dbab20e28eecef8251f /src/cpu/intel/socket_BGA956 | |
parent | 5b24c6d304ed3912419b95c9af7fd496897638a7 (diff) |
mb/asrock/h110m/romstage.c: Correct FSP-M UPDs
The DQ and DQS byte maps do not apply to DDR4 configurations, and the
RCOMP resistor and target values are not correct for SKL-S (or KBL-S).
Drop the byte maps and use RCOMP values for the correct platform type.
RCOMP resistor values for all non-socketed platforms are listed in the
Platform Design Guide, and also appear in schematics. For SKL-S, the
RCOMP resistors are on the CPU and their values have been confirmed
by measuring them on an i5-6400, and match the PDG values for SKL-H.
RCOMP target values can be guessed from Intel Document #573387 and some
of them are also present in datasheet volume 1, under DC specifications.
Change-Id: I699d46b9b516be8946367e6d9b24883ae1e78d03
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46246
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/cpu/intel/socket_BGA956')
0 files changed, 0 insertions, 0 deletions