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authorArthur Heymans <arthur@aheymans.xyz>2019-11-12 23:34:13 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-11-15 16:45:48 +0000
commite27c013f39f0433dac57a754b3484553a536f30d (patch)
tree6e9b9d20964ac994c453079ca9c13cb145480dbd /src/cpu/intel/socket_441/Kconfig
parentdc584c3f221bb59ee6b89e5517617b9d1d74bcf3 (diff)
nb/intel/i945: Move to C_ENVIRONMENT_BOOTBLOCK
Console init in bootblock will be done in a separate CL. Change-Id: Ia2405013f262d904aa82be323e928223dbb4296c Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36795 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/intel/socket_441/Kconfig')
-rw-r--r--src/cpu/intel/socket_441/Kconfig9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/cpu/intel/socket_441/Kconfig b/src/cpu/intel/socket_441/Kconfig
index ac249c5755..af43f72e53 100644
--- a/src/cpu/intel/socket_441/Kconfig
+++ b/src/cpu/intel/socket_441/Kconfig
@@ -8,6 +8,11 @@ config SOCKET_SPECIFIC_OPTIONS # dummy
select CPU_INTEL_MODEL_106CX
select MMX
select SSE
+ select SETUP_XIP_CACHE
+
+config C_ENV_BOOTBLOCK_SIZE
+ hex
+ default 0x4000
config DCACHE_RAM_BASE
hex
@@ -17,4 +22,8 @@ config DCACHE_RAM_SIZE
hex
default 0x8000
+config DCACHE_BSP_STACK_SIZE
+ hex
+ default 0x2000
+
endif # CPU_INTEL_SOCKET_441