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author | Derek Huang <derek.huang@intel.corp-partner.google.com> | 2021-01-27 17:01:00 +0800 |
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committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-02-03 20:11:06 +0000 |
commit | ed6bda2818a8ce79a36f9e5a2e30f1be6299724a (patch) | |
tree | 41d88e803d52ea6d0b50339a2cccf06d14b05d81 /src/cpu/intel/slot_1 | |
parent | e65e9dd6b12255b94547fa8aeb2195def0bfb76b (diff) |
soc/intel/tgl: Add configurable value for ConfigTdpLevel
According to Tigerlake TDP specifications (doc #575683, table 4-2),
TGL supports different TDP levels depends on CPU segement/package,
IA Cores and graphics configuration. For example, UP3 4-Core GT2
suppots base TDP=28W, Configurable TDP-Down_1=15W and Configurable
TDP-Down_2=12W. This configurable value can be used to select
suitable TDP level
Change-Id: I4242575807caac172b6cbe667839bf6c9241f3c5
Signed-off-by: Derek Huang <derek.huang@intel.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50104
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/cpu/intel/slot_1')
0 files changed, 0 insertions, 0 deletions