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author | Felix Held <felix-coreboot@felixheld.de> | 2024-04-19 17:08:08 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2024-04-22 18:37:07 +0000 |
commit | 3a988ccebfadf16671f460484794cc573b993e8b (patch) | |
tree | 08db1422d439f5a96fa1395ba0f9427a8971cef8 /src/cpu/intel/slot_1/l2_cache.c | |
parent | d7427c6dc84a808611886f582d8aded467b50abc (diff) |
soc/amd/phoenix/acpi: call acpi_add_opensil_tables in openSIL case
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ifdfdbf193bd96a6dda72a2f23d51925fd369aa01
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82013
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Diffstat (limited to 'src/cpu/intel/slot_1/l2_cache.c')
0 files changed, 0 insertions, 0 deletions