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authorArthur Heymans <arthur@aheymans.xyz>2022-11-30 23:24:31 +0100
committerLean Sheng Tan <sheng.tan@9elements.com>2024-02-21 16:19:05 +0000
commit7552eb210c1681747bfac6030af9f74d25330595 (patch)
tree0c2d40efda2474f4edaedb7d77a8a42ce30ecf6a /src/cpu/intel/model_f4x
parentf317068fc3138162a59b802773795edfe3e8a8ef (diff)
lib/lzmadecode: Allow for 8 byte reads on 64bit
This adds an optimization to lzma decode to also read from the boot medium in chunks of 8 bytes if that is the general purpose register length instead of always 4 bytes. It depends on the cache / memory / spi controller whether this is faster, but it's likely to be either the same or faster. TESTED - google/vilboz: cached boot medium 64bit before - 32bit - 64bit after load FSP-M: 35,674 - 35,595 - 34,690 load ramstage: 42,134 - 43,378 - 40,882 load FSP-S: 24,954 - 25,496 - 24,368 - foxconn/g41m: uncached boot medium for testing 64bit before - 32bit - 64bit after load ramstage: 51,164 - 51,872 - 51,894 Change-Id: I890c075307c0aec877618d9902ea352ae42a3bfa Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70175 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/cpu/intel/model_f4x')
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