diff options
| author | Eric Biederman <ebiederm@xmission.com> | 2004-10-23 02:47:13 +0000 |
|---|---|---|
| committer | Eric Biederman <ebiederm@xmission.com> | 2004-10-23 02:47:13 +0000 |
| commit | 60216355d21fae62daf00afa66443b03ed743e2a (patch) | |
| tree | 18e3eb1ba2abbac7cc2e49803354ee1a1303e060 /src/cpu/intel/model_f2x | |
| parent | 720a8f57ef1a1a4264354dd9601c53e12b82ae36 (diff) | |
- With Xeon cpus it seems best to use the tsc calibrated with timer2 as
the time source. The apic timer also has a variable time base.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1711 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/intel/model_f2x')
| -rw-r--r-- | src/cpu/intel/model_f2x/Config.lb | 7 | ||||
| -rw-r--r-- | src/cpu/intel/model_f2x/apic_timer.c | 26 |
2 files changed, 0 insertions, 33 deletions
diff --git a/src/cpu/intel/model_f2x/Config.lb b/src/cpu/intel/model_f2x/Config.lb index b985ffc12d..e5121065b8 100644 --- a/src/cpu/intel/model_f2x/Config.lb +++ b/src/cpu/intel/model_f2x/Config.lb @@ -1,5 +1,3 @@ -uses CONFIG_UDELAY_TSC - dir /cpu/x86/mtrr dir /cpu/x86/fpu dir /cpu/x86/mmx @@ -10,8 +8,3 @@ dir /cpu/intel/microcode dir /cpu/intel/hyperthreading driver model_f2x_init.o -if CONFIG_UDELAY_TSC - dir /cpu/x86/tsc -else - object apic_timer.o -end diff --git a/src/cpu/intel/model_f2x/apic_timer.c b/src/cpu/intel/model_f2x/apic_timer.c deleted file mode 100644 index 5a81f912c5..0000000000 --- a/src/cpu/intel/model_f2x/apic_timer.c +++ /dev/null @@ -1,26 +0,0 @@ -#include <stdint.h> -#include <delay.h> -#include <cpu/x86/msr.h> -#include <cpu/x86/lapic.h> - -void init_timer(void) -{ - /* Set the apic timer to no interrupts and periodic mode */ - lapic_write(LAPIC_LVTT, (1 << 17)|(1<< 16)|(0 << 12)|(0 << 0)); - /* Set the divider to 1, no divider */ - lapic_write(LAPIC_TDCR, LAPIC_TDR_DIV_1); - /* Set the initial counter to 0xffffffff */ - lapic_write(LAPIC_TMICT, 0xffffffff); -} - -void udelay(unsigned usecs) -{ - uint32_t start, value, ticks; - /* Calculate the number of ticks to run, our FSB runs a 200Mhz */ - ticks = usecs * 200; - start = lapic_read(LAPIC_TMCCT); - do { - value = lapic_read(LAPIC_TMCCT); - } while((start - value) < ticks); - -} |