diff options
| author | Paul Menzel <paulepanter@users.sourceforge.net> | 2017-02-27 01:01:55 +0100 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2017-03-09 10:06:12 +0100 |
| commit | 7129ccbd2330c42e9dc32c6e8127620556260c33 (patch) | |
| tree | 750f85955a2118a3e7b161cd57277f9ab64ab69f /src/cpu/intel/model_6fx | |
| parent | a89254801cb033d43337f8f89f815673d327d42d (diff) | |
cpu/intel/model_6{e,f}x: Unify init files
The init files for the Core Duo and Core 2 Duo are very similar. Reduce
the differences, by using the same order for the include statements, the
same blank lines, and the same comments.
Change-Id: I0de060222a61a482377c760c6031d73c7e318edf
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/18506
Tested-by: build bot (Jenkins)
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/cpu/intel/model_6fx')
| -rw-r--r-- | src/cpu/intel/model_6fx/model_6fx_init.c | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/src/cpu/intel/model_6fx/model_6fx_init.c b/src/cpu/intel/model_6fx/model_6fx_init.c index d29895b299..3a6319a62c 100644 --- a/src/cpu/intel/model_6fx/model_6fx_init.c +++ b/src/cpu/intel/model_6fx/model_6fx_init.c @@ -21,9 +21,9 @@ #include <cpu/x86/mtrr.h> #include <cpu/x86/msr.h> #include <cpu/x86/lapic.h> +#include <cpu/intel/hyperthreading.h> #include <cpu/intel/microcode.h> #include <cpu/intel/speedstep.h> -#include <cpu/intel/hyperthreading.h> #include <cpu/x86/cache.h> #include <cpu/x86/name.h> #include <cpu/intel/common/common.h> @@ -34,12 +34,11 @@ static void configure_c_states(void) msr_t msr; msr = rdmsr(MSR_PMG_CST_CONFIG_CONTROL); - msr.lo |= (1 << 15); // config lock until next reset msr.lo |= (1 << 14); // Deeper Sleep - msr.lo |= (1 << 10); // Enable IO MWAIT redirection - msr.lo &= ~(1 << 9); // Issue a single stop grant cycle upon stpclk - msr.lo |= (1 << 3); // Dynamic L2 + msr.lo |= (1 << 10); // Enable I/O MWAIT redirection for C-States + msr.lo &= ~(1 << 9); // Issue a single stop grant cycle upon stpclk + msr.lo |= (1 << 3); // dynamic L2 /* Number of supported C-States */ msr.lo &= ~7; @@ -47,7 +46,7 @@ static void configure_c_states(void) wrmsr(MSR_PMG_CST_CONFIG_CONTROL, msr); - /* Set Processor MWAIT IO BASE */ + /* Set Processor MWAIT IO BASE (P_BLK) */ msr.hi = 0; msr.lo = ((PMB0_BASE + 4) & 0xffff) | (((PMB1_BASE + 9) & 0xffff) << 16); wrmsr(MSR_PMG_IO_BASE_ADDR, msr); |