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authorArthur Heymans <arthur@aheymans.xyz>2019-01-21 17:55:02 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-01-24 13:39:19 +0000
commit7e6946a74c714ff109c35d97001b22c9e868aaea (patch)
tree98899e89dc00f8e5504f06d84eb6dc44227b4c80 /src/cpu/intel/model_206ax
parentd6c15d0c8c39015994a180da82c3e6f9538b42de (diff)
cpu/intel/model_206ax: Remove the notion of sockets
With the memory controller the separate sockets becomes a useless distinction. They all used the same code anyway. UNTESTED: This also updates autoport. Change-Id: I044d434a5b8fca75db9eb193c7ffc60f3c78212b Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/31031 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Tristan Corrick <tristan@corrick.kiwi> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/intel/model_206ax')
-rw-r--r--src/cpu/intel/model_206ax/Kconfig1
-rw-r--r--src/cpu/intel/model_206ax/Makefile.inc8
2 files changed, 9 insertions, 0 deletions
diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig
index cb09d23750..7f73da9ab4 100644
--- a/src/cpu/intel/model_206ax/Kconfig
+++ b/src/cpu/intel/model_206ax/Kconfig
@@ -13,6 +13,7 @@ config CPU_SPECIFIC_OPTIONS
select ARCH_ROMSTAGE_X86_32
select ARCH_RAMSTAGE_X86_32
select SMP
+ select MMX
select SSE2
select UDELAY_TSC
select TSC_CONSTANT_RATE
diff --git a/src/cpu/intel/model_206ax/Makefile.inc b/src/cpu/intel/model_206ax/Makefile.inc
index 2c1d961deb..d193e60a4c 100644
--- a/src/cpu/intel/model_206ax/Makefile.inc
+++ b/src/cpu/intel/model_206ax/Makefile.inc
@@ -3,6 +3,14 @@ subdirs-y += ../../x86/name
subdirs-y += ../smm/gen1
subdirs-y += ../common
+subdirs-y += ../../x86/tsc
+subdirs-y += ../../x86/mtrr
+subdirs-y += ../../x86/lapic
+subdirs-y += ../../x86/cache
+subdirs-y += ../../x86/smm
+subdirs-y += ../microcode
+subdirs-y += ../turbo
+
ramstage-y += acpi.c
ramstage-y += common.c