diff options
| author | Yu-Ping Wu <yupingso@chromium.org> | 2022-11-14 16:33:42 +0800 |
|---|---|---|
| committer | Eric Lai <eric_lai@quanta.corp-partner.google.com> | 2023-02-08 00:54:16 +0000 |
| commit | 5aed1a0d727163f6fa6dae97a8f852edb7a6fe19 (patch) | |
| tree | 0c29f6acc9a5a323728e43d4c6fff8bafe0bbf90 /src/cpu/intel/model_206ax | |
| parent | 1b7489839561e06d0f64bc1f9b0445725ec59c30 (diff) | |
mb/samsung: Enable VBOOT_VBNV_FLASH
To deprecate VBOOT_VBNV_CMOS [1], replace VBOOT_VBNV_CMOS with
VBOOT_VBNV_FLASH for samsung boards lumpy and stumpy. 0x8000 unused
flash space is allocated for RW_NVRAM.
Previously BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES was selected for
CPU_INTEL_HASWELL, CPU_INTEL_MODEL_{2065X,206AX} and others (see [2]).
However, there seems to be no particular reason on those platforms.
We've dropped the config for haswell. Now drop it for
CPU_INTEL_MODEL_{2065X,206AX}, so that VBOOT_VBNV_FLASH can be enabled.
[1] https://web.archive.org/web/20230115020833/https://issuetracker.google.com/issues/235293589?pli=1
[2] commit 6c2568f4f58b9a1b209c9af36d7f980fde784f08
("drivers/spi: Add BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES config")
BUG=b:235293589
TEST=./util/abuild/abuild -a -t SAMSUNG_LUMPY -x
Change-Id: I833edd4f7a328b21e81c971ba8a9aec0aad7d3d3
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70296
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yidi Lin <yidilin@google.com>
Diffstat (limited to 'src/cpu/intel/model_206ax')
| -rw-r--r-- | src/cpu/intel/model_206ax/Kconfig | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index c168c9bd01..032450dd32 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -6,7 +6,6 @@ if CPU_INTEL_MODEL_206AX config CPU_SPECIFIC_OPTIONS def_bool y select ARCH_X86 - select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES select HAVE_EXP_X86_64_SUPPORT if USE_NATIVE_RAMINIT select MMX select SSE2 |