diff options
author | Patrick Georgi <patrick@georgi-clan.de> | 2013-02-09 15:35:30 +0100 |
---|---|---|
committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-02-09 21:02:35 +0100 |
commit | 644e83b0070c28ffa0f68ac1966df968b0a500d9 (patch) | |
tree | 31759c48e465cea9116b618c8c3924f761335874 /src/cpu/intel/model_206ax/model_206ax_init.c | |
parent | dbc6ca7aea6e2474c30b4c3892abe0b3055abf67 (diff) |
speedstep: Deduplicate some MSR identifiers
In particular:
MSR_PMG_CST_CONFIG_CONTROL
MSR_PMG_IO_BASE_ADDR
MSR_PMG_IO_CAPTURE_ADDR
Change-Id: Ief2697312f0edf8c45f7d3550a7bedaff1b69dc6
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/2337
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu/intel/model_206ax/model_206ax_init.c')
-rw-r--r-- | src/cpu/intel/model_206ax/model_206ax_init.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c index 71879e2b1f..d1f9277111 100644 --- a/src/cpu/intel/model_206ax/model_206ax_init.c +++ b/src/cpu/intel/model_206ax/model_206ax_init.c @@ -316,11 +316,11 @@ static void configure_c_states(void) msr.lo |= 7; // No package C-state limit wrmsr(MSR_PMG_CST_CONFIG_CONTROL, msr); - msr = rdmsr(MSR_PMG_IO_CAPTURE_BASE); + msr = rdmsr(MSR_PMG_IO_CAPTURE_ADDR); msr.lo &= ~0x7ffff; msr.lo |= (PMB0_BASE + 4); // LVL_2 base address msr.lo |= (2 << 16); // CST Range: C7 is max C-state - wrmsr(MSR_PMG_IO_CAPTURE_BASE, msr); + wrmsr(MSR_PMG_IO_CAPTURE_ADDR, msr); msr = rdmsr(MSR_MISC_PWR_MGMT); msr.lo &= ~(1 << 0); // Enable P-state HW_ALL coordination |