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| author | Arthur Heymans <arthur@aheymans.xyz> | 2018-05-15 16:35:45 +0200 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2019-05-27 17:25:44 +0000 |
| commit | b66ee5507c4c2395868a5cd350dc8a7eb46542fd (patch) | |
| tree | 0129c006c91dabd223074bc8643c739de0b81e24 /src/cpu/intel/model_2065x/model_2065x.h | |
| parent | 548f33a9f4a7675c42822516c285bdf2c8bb64de (diff) | |
cpu/intel/model_2065x: Use parallel MP init
TESTED on Thinkpad X201 with a i7 CPU M620 CPU (hyperthread dual core).
Boots ~28ms faster.
Change-Id: I56b352f9d76ee58f5c82cd431a4e0fa206f848a0
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/26297
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/cpu/intel/model_2065x/model_2065x.h')
| -rw-r--r-- | src/cpu/intel/model_2065x/model_2065x.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/cpu/intel/model_2065x/model_2065x.h b/src/cpu/intel/model_2065x/model_2065x.h index 1e6a311910..904e794219 100644 --- a/src/cpu/intel/model_2065x/model_2065x.h +++ b/src/cpu/intel/model_2065x/model_2065x.h @@ -20,6 +20,7 @@ /* Nehalem bus clock is fixed at 133MHz */ #define NEHALEM_BCLK 133 +#define CORE_THREAD_COUNT_MSR 0x35 #define MSR_FEATURE_CONFIG 0x13c #define MSR_FLEX_RATIO 0x194 #define FLEX_RATIO_LOCK (1 << 20) |