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authorAngel Pons <th3fanbus@gmail.com>2021-01-21 22:05:34 +0100
committerAngel Pons <th3fanbus@gmail.com>2021-01-24 23:23:35 +0000
commit00d66603dbf3d306807179a7d27258430e13f5de (patch)
tree5e5ff8435ef79769eaf1612a8d08021223d91b25 /src/cpu/intel/model_2065x/chip.h
parentae4eba9be55c8dd660a63ea45eecb2604cfae7ce (diff)
cpu/intel/model_2065x: Drop unused c-state code
None of the mainboards have the magic SpeedStep device, so the C-state generation function bails out without doing anything. Moreover, this code is broken and was copied from Sandy Bridge. Thus, drop it. Change-Id: I580157ee33c599af5fc48b06eeb39cb32c9831ec Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49806 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/cpu/intel/model_2065x/chip.h')
-rw-r--r--src/cpu/intel/model_2065x/chip.h8
1 files changed, 0 insertions, 8 deletions
diff --git a/src/cpu/intel/model_2065x/chip.h b/src/cpu/intel/model_2065x/chip.h
index d9b1057324..4ee91f6821 100644
--- a/src/cpu/intel/model_2065x/chip.h
+++ b/src/cpu/intel/model_2065x/chip.h
@@ -4,13 +4,5 @@
#define SPEEDSTEP_APIC_MAGIC 0xACAC
struct cpu_intel_model_2065x_config {
- int c1_battery; /* ACPI C1 on Battery Power */
- int c2_battery; /* ACPI C2 on Battery Power */
- int c3_battery; /* ACPI C3 on Battery Power */
-
- int c1_acpower; /* ACPI C1 on AC Power */
- int c2_acpower; /* ACPI C2 on AC Power */
- int c3_acpower; /* ACPI C3 on AC Power */
-
int tcc_offset; /* TCC Activation Offset */
};