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authorWerner Zeh <werner.zeh@siemens.com>2022-10-20 15:49:21 +0200
committerMartin L Roth <gaumless@gmail.com>2022-10-22 16:42:22 +0000
commit6537216b7a4705409ef3eee75bc685bf70ec30a3 (patch)
tree3762d809740471dc1521d9cce70009b86f36a5eb /src/cpu/intel/model_2065x/acpi.c
parent516eff01e61155a681a4f684515ae7924b9bff0d (diff)
mb/siemens/mc_ehl: Add FIVR config to devicetree for all variants
Add a config for FIVR in devicetree for both, mc_ehl1 and mc_ehl2 variants in order to provide the real delay value for the VCC supply rail. This delay is needed to enable proper switching between different VCC levels based on current system state. Change-Id: Ibccb8ea1b42ccd2ff0a37cbd9651528a2a55ebd6 Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68666 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/cpu/intel/model_2065x/acpi.c')
0 files changed, 0 insertions, 0 deletions