diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2018-06-03 12:26:58 +0200 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2018-06-05 07:58:57 +0000 |
| commit | 02b13fd8cdfbfcb4858ec0e6f66688b96950198e (patch) | |
| tree | 1faac362cb685c090ac6b2ccc08feb9f9e44235b /src/cpu/intel/model_2065x/Makefile.inc | |
| parent | 6fcd7b8eb1ee650daa939593e8cbb3939f7c1188 (diff) | |
cpu/intel/model_2065x: Switch to POSTCAR_STAGE
Also removes some non-POSTCAR_STAGE functions, since those are unused
now.
Change-Id: I439bffbe39411186355d374eed7d5efd63fb02e3
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/26792
Reviewed-by: Matthias Gazzari <mail@qtux.eu>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/intel/model_2065x/Makefile.inc')
| -rw-r--r-- | src/cpu/intel/model_2065x/Makefile.inc | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/src/cpu/intel/model_2065x/Makefile.inc b/src/cpu/intel/model_2065x/Makefile.inc index 44d74603b2..ec8643a204 100644 --- a/src/cpu/intel/model_2065x/Makefile.inc +++ b/src/cpu/intel/model_2065x/Makefile.inc @@ -20,11 +20,7 @@ smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_2065x/microcode.bin -ifneq ($(CONFIG_POSTCAR_STAGE),y) -cpu_incs-y += $(src)/cpu/intel/model_2065x/cache_as_ram.inc -else cpu_incs-y += $(src)/cpu/intel/car/non-evict/cache_as_ram.S postcar-y += ../car/non-evict/exit_car.S -endif romstage-y += ../car/romstage.c |