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authorKyösti Mälkki <kyosti.malkki@gmail.com>2016-06-17 10:43:48 +0300
committerMartin Roth <martinroth@google.com>2016-06-21 00:43:20 +0200
commit408d3928236f275633f8656cc12e32949d304d9f (patch)
treea02149efa1a0b57c0ed8b5afe4bb76f98d35bff2 /src/cpu/intel/model_106cx/Makefile.inc
parent07921540dda79d810d8bfc6be211513c238a0d63 (diff)
intel/car/cache_as_ram_ht.inc: Prepare for dynamic CONFIG_RAMTOP
Change-Id: Idb0f621553e76e771a5d6f2d492675ccd989d947 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/15228 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/cpu/intel/model_106cx/Makefile.inc')
-rw-r--r--src/cpu/intel/model_106cx/Makefile.inc1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/cpu/intel/model_106cx/Makefile.inc b/src/cpu/intel/model_106cx/Makefile.inc
index 25631e5d36..d15c362dc0 100644
--- a/src/cpu/intel/model_106cx/Makefile.inc
+++ b/src/cpu/intel/model_106cx/Makefile.inc
@@ -2,4 +2,5 @@ ramstage-y += model_106cx_init.c
subdirs-y += ../../x86/name
cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram_ht.inc
+romstage-y += ../car/romstage.c
cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_106cx/microcode.bin