From 408d3928236f275633f8656cc12e32949d304d9f Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Fri, 17 Jun 2016 10:43:48 +0300 Subject: intel/car/cache_as_ram_ht.inc: Prepare for dynamic CONFIG_RAMTOP MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Idb0f621553e76e771a5d6f2d492675ccd989d947 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/15228 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/cpu/intel/model_106cx/Makefile.inc | 1 + 1 file changed, 1 insertion(+) (limited to 'src/cpu/intel/model_106cx/Makefile.inc') diff --git a/src/cpu/intel/model_106cx/Makefile.inc b/src/cpu/intel/model_106cx/Makefile.inc index 25631e5d36..d15c362dc0 100644 --- a/src/cpu/intel/model_106cx/Makefile.inc +++ b/src/cpu/intel/model_106cx/Makefile.inc @@ -2,4 +2,5 @@ ramstage-y += model_106cx_init.c subdirs-y += ../../x86/name cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram_ht.inc +romstage-y += ../car/romstage.c cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_106cx/microcode.bin -- cgit v1.2.3