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authorAngel Pons <th3fanbus@gmail.com>2021-10-11 14:26:42 +0200
committerAngel Pons <th3fanbus@gmail.com>2021-10-15 13:43:05 +0000
commitcb70d836ed048b81ad8047e97c9758680cc2da2d (patch)
tree3b94940d19c31ddb080ac9cce30cae9be3016ea8 /src/cpu/intel/model_1067x
parentadb393bdd6cd6734fa2672bd174aca4588a68016 (diff)
cpu/intel/haswell: Lock PKG_CST_CONFIG_CONTROL MSR
Set PKG_CST_CONFIG_CONTROL MSR bit 15 to make bits 15:0 read-only. Change-Id: Ieb740aa94255cb3c23a56495c4b645d847637b7f Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58222 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/cpu/intel/model_1067x')
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