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| author | Jeff Daly <jeffd@silicom-usa.com> | 2022-01-05 23:51:40 -0500 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-04 20:11:10 +0000 |
| commit | 3623eca5253b6863b3677953cac342b3a1f85dad (patch) | |
| tree | c7755623048c7471008b4669869de7afba434a70 /src/cpu/intel/microcode | |
| parent | 8b94d3e9d94b5c9a7add46e95e3e2fb9ebaa60e6 (diff) | |
util/ifdtool: Add additional regions for platforms that support them
Some Intel SoCs such as Denverton support additional SPI regions for
things like Innovation Engine firmware or 10GbE LAN firmwares
Signed-off-by: Jeff Daly <jeffd@silicom-usa.com>
Change-Id: Ia5a450e5002e9f8edee76ca7c2eede9906df36c5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60829
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/cpu/intel/microcode')
0 files changed, 0 insertions, 0 deletions