diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2016-02-05 14:58:06 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-02-10 18:08:28 +0100 |
| commit | a02bb653fdfdd0e1c0426d3573a979594a93eb58 (patch) | |
| tree | 8d33cfda3caad26be235469becf6aee39de34c0d /src/cpu/intel/microcode/Makefile.inc | |
| parent | 5a70d6bdf2e70b29740a36061321af59b3005f85 (diff) | |
cpu/intel/microcode: allow microcode to be loaded in romstage
The previous usage of the intel microcode support supported using
the library under ROMCC and ramstage. Allow for microcode support
to be used in normal C-based romstage as well by:
1. Only using walkcbfs when ROMCC is defined.
2. Only using spinlocks if !__PRE_RAM__
The header file now unconditionally exposes the declarations
of the supporting functions.
Change-Id: I903578bcb4422b4c050903c53b60372b64b79af1
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/13611
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/cpu/intel/microcode/Makefile.inc')
| -rw-r--r-- | src/cpu/intel/microcode/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/cpu/intel/microcode/Makefile.inc b/src/cpu/intel/microcode/Makefile.inc index 1feb50495a..7452973319 100644 --- a/src/cpu/intel/microcode/Makefile.inc +++ b/src/cpu/intel/microcode/Makefile.inc @@ -3,3 +3,4 @@ ## directly from CBFS. You have been WARNED!!! ################################################################################ ramstage-$(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) += microcode.c +romstage-$(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) += microcode.c |