diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-01-05 17:18:11 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-01-11 10:19:16 +0000 |
| commit | c6bf74ec757b4445a14179a9960d4532fd0eb479 (patch) | |
| tree | d77e1f701d9cabe0757325236ab63966061f222c /src/cpu/intel/microcode/Makefile.inc | |
| parent | a706ad54446afc418c60776c06e699943ce4bdd5 (diff) | |
cpu/intel/microcode: Support update before CAR entry
Change-Id: Ie3c2d2e1bc79dcaffd9901e17f83ceeaabd1d659
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30682
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/cpu/intel/microcode/Makefile.inc')
| -rw-r--r-- | src/cpu/intel/microcode/Makefile.inc | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/src/cpu/intel/microcode/Makefile.inc b/src/cpu/intel/microcode/Makefile.inc index f589430771..2df1d5eb6f 100644 --- a/src/cpu/intel/microcode/Makefile.inc +++ b/src/cpu/intel/microcode/Makefile.inc @@ -1,6 +1,5 @@ -################################################################################ -## One small file with the awesome super-power of updating the CPU microcode -## directly from CBFS. You have been WARNED!!! -################################################################################ +bootblock-$(CONFIG_MICROCODE_UPDATE_PRE_RAM) += microcode_asm.S +romstage-$(CONFIG_MICROCODE_UPDATE_PRE_RAM) += microcode_asm.S + ramstage-$(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) += microcode.c romstage-$(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) += microcode.c |