From c6bf74ec757b4445a14179a9960d4532fd0eb479 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Sat, 5 Jan 2019 17:18:11 +0100 Subject: cpu/intel/microcode: Support update before CAR entry MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Ie3c2d2e1bc79dcaffd9901e17f83ceeaabd1d659 Signed-off-by: Arthur Heymans Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/30682 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/cpu/intel/microcode/Makefile.inc | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) (limited to 'src/cpu/intel/microcode/Makefile.inc') diff --git a/src/cpu/intel/microcode/Makefile.inc b/src/cpu/intel/microcode/Makefile.inc index f589430771..2df1d5eb6f 100644 --- a/src/cpu/intel/microcode/Makefile.inc +++ b/src/cpu/intel/microcode/Makefile.inc @@ -1,6 +1,5 @@ -################################################################################ -## One small file with the awesome super-power of updating the CPU microcode -## directly from CBFS. You have been WARNED!!! -################################################################################ +bootblock-$(CONFIG_MICROCODE_UPDATE_PRE_RAM) += microcode_asm.S +romstage-$(CONFIG_MICROCODE_UPDATE_PRE_RAM) += microcode_asm.S + ramstage-$(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) += microcode.c romstage-$(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) += microcode.c -- cgit v1.2.3