diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-10-28 19:15:36 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-01-07 10:30:49 +0000 |
| commit | ca965496ffd84d8510961c520aff22bf1cc3a3eb (patch) | |
| tree | e641d7d5af31516f2e145f77040b9f9560f8f287 /src/cpu/intel/haswell | |
| parent | d95fe364aa5402c3a111f863a0438b70cdcd637e (diff) | |
cpu/intel/haswell: Rename `HASWELL_BCLK` to `CPU_BCLK`
This is just to ease merging with Broadwell.
Tested with BUILD_TIMELESS=1, Asrock B85M Pro4 remains identical.
Change-Id: I9239489fe48f04714e6626b57ef07ca8b3013024
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46910
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/intel/haswell')
| -rw-r--r-- | src/cpu/intel/haswell/acpi.c | 4 | ||||
| -rw-r--r-- | src/cpu/intel/haswell/haswell.h | 2 | ||||
| -rw-r--r-- | src/cpu/intel/haswell/haswell_init.c | 2 |
3 files changed, 4 insertions, 4 deletions
diff --git a/src/cpu/intel/haswell/acpi.c b/src/cpu/intel/haswell/acpi.c index 6dd8559d22..b757dc6101 100644 --- a/src/cpu/intel/haswell/acpi.c +++ b/src/cpu/intel/haswell/acpi.c @@ -209,7 +209,7 @@ static void generate_P_state_entries(int core, int cores_per_package) /* Max Non-Turbo Ratio */ ratio_max = (msr.lo >> 8) & 0xff; } - clock_max = ratio_max * HASWELL_BCLK; + clock_max = ratio_max * CPU_BCLK; /* Calculate CPU TDP in mW */ msr = rdmsr(MSR_PKG_POWER_SKU_UNIT); @@ -273,7 +273,7 @@ static void generate_P_state_entries(int core, int cores_per_package) /* Calculate power at this ratio */ power = calculate_power(power_max, ratio_max, ratio); - clock = ratio * HASWELL_BCLK; + clock = ratio * CPU_BCLK; acpigen_write_PSS_package( clock, /*MHz*/ diff --git a/src/cpu/intel/haswell/haswell.h b/src/cpu/intel/haswell/haswell.h index 9349a3d654..07013325d6 100644 --- a/src/cpu/intel/haswell/haswell.h +++ b/src/cpu/intel/haswell/haswell.h @@ -18,7 +18,7 @@ #define HASWELL_STEPPING_ULT_C0 1 /* Haswell bus clock is fixed at 100MHz */ -#define HASWELL_BCLK 100 +#define CPU_BCLK 100 #define MSR_CORE_THREAD_COUNT 0x35 #define MSR_FEATURE_CONFIG 0x13c diff --git a/src/cpu/intel/haswell/haswell_init.c b/src/cpu/intel/haswell/haswell_init.c index 32b6a9daf4..4b73c6a28c 100644 --- a/src/cpu/intel/haswell/haswell_init.c +++ b/src/cpu/intel/haswell/haswell_init.c @@ -596,7 +596,7 @@ static void set_max_ratio(void) wrmsr(IA32_PERF_CTL, perf_ctl); printk(BIOS_DEBUG, "CPU: frequency set to %d\n", - ((perf_ctl.lo >> 8) & 0xff) * HASWELL_BCLK); + ((perf_ctl.lo >> 8) & 0xff) * CPU_BCLK); } static void configure_mca(void) |