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authorFelix Held <felix-coreboot@felixheld.de>2021-07-13 16:44:18 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-07-14 17:33:34 +0000
commitacbf1541eeedec58ce8a31c6847b2296f40bf4bd (patch)
treefb9ad109c676793801e824707f6f8d0d6c2cc9b1 /src/cpu/intel/haswell
parentbf1f1df41ba998a1c3898cd513a47ebdfd05609d (diff)
src: use mca_clear_status function instead of open coding
Change-Id: I53413b4051b79d7c2f24b1191ce877155e654400 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56259 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/intel/haswell')
-rw-r--r--src/cpu/intel/haswell/haswell_init.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/src/cpu/intel/haswell/haswell_init.c b/src/cpu/intel/haswell/haswell_init.c
index 29c663e2e7..2c6384c4e3 100644
--- a/src/cpu/intel/haswell/haswell_init.c
+++ b/src/cpu/intel/haswell/haswell_init.c
@@ -527,12 +527,10 @@ static void configure_mca(void)
for (i = 0; i < num_banks; i++)
wrmsr(IA32_MC_CTL(i), msr);
- msr.lo = msr.hi = 0;
/* TODO(adurbin): This should only be done on a cold boot. Also, some
* of these banks are core vs package scope. For now every CPU clears
* every bank. */
- for (i = 0; i < num_banks; i++)
- wrmsr(IA32_MC_STATUS(i), msr);
+ mca_clear_status();
}
/* All CPUs including BSP will run the following function. */