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| author | Ivy Jian <ivy.jian@quanta.corp-partner.google.com> | 2024-03-20 15:14:38 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-03-21 17:52:12 +0000 |
| commit | a779b989a2175ee1ed3df8f4e6ee998998ea6c7e (patch) | |
| tree | db47a35eb60615deab4ab09df5719da32b167e78 /src/cpu/intel/haswell | |
| parent | 1ba3d1630a9737cc74a93540af30adb8a1d80160 (diff) | |
mb/google/brox: Configure I2C timing for I2C devices
Configure I2C0/1 timing in devicetree to meet timing requirement.
(THIGH(us) minimum is 0.6us).
Before:
I2C0 : THIGH(us) 0.595us
I2C1 : THIGH(us) 0.582us
After:
I2C0 : THIGH(us) 0.673us
I2C1 : THIGH(us) 0.666us
Change-Id: I79af4fde4eb08d4eb896794756a633701bebb755
Signed-off-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81348
Reviewed-by: Shelley Chen <shchen@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/cpu/intel/haswell')
0 files changed, 0 insertions, 0 deletions