diff options
author | Angel Pons <th3fanbus@gmail.com> | 2020-11-23 13:28:57 +0100 |
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committer | Angel Pons <th3fanbus@gmail.com> | 2021-01-24 12:04:25 +0000 |
commit | e751a101c08d540c59fc39def9681a0ee227d825 (patch) | |
tree | 89443ef7d6e3f5d8318dd5b8b9ff35834fc1bc91 /src/cpu/intel/haswell/Makefile.inc | |
parent | b89c8bb13536abeb84bfaad28bbbd8ebfacb0137 (diff) |
soc/intel/broadwell: Move romstage.c to Haswell
Broadwell no longer has CPU code.
Change-Id: I9c9717439a702dddaa613a30e6f3da29887ec4bd
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46951
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/intel/haswell/Makefile.inc')
-rw-r--r-- | src/cpu/intel/haswell/Makefile.inc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc index 3c4db4f1c8..bfb501133c 100644 --- a/src/cpu/intel/haswell/Makefile.inc +++ b/src/cpu/intel/haswell/Makefile.inc @@ -1,4 +1,6 @@ ramstage-y += haswell_init.c + +romstage-y += romstage.c romstage-y += ../car/romstage.c ramstage-y += acpi.c |