diff options
| author | Martin Roth <martin.roth@se-eng.com> | 2014-12-04 18:06:36 -0700 |
|---|---|---|
| committer | Martin Roth <gaumless@gmail.com> | 2014-12-05 21:40:12 +0100 |
| commit | e10108a6691c804f4b917be9a25bc8af3d7cc6a1 (patch) | |
| tree | 80c07347eb12374db8877b4ed3b157a6190b37cf /src/cpu/intel/fsp_model_406dx | |
| parent | db3e2f0931a52bee6e59d09df572fd0bfb481ff9 (diff) | |
FSP platform microcode: Update to remove Kconfig variable
Move the Kconfig variable into a .h file - this does not need to be
in Kconfig.
Change-Id: I1db20790ddb32e0eb082503c6c60cbbefa818bb9
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/7646
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/cpu/intel/fsp_model_406dx')
| -rw-r--r-- | src/cpu/intel/fsp_model_406dx/Kconfig | 6 | ||||
| -rw-r--r-- | src/cpu/intel/fsp_model_406dx/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/cpu/intel/fsp_model_406dx/microcode_blob.c | 4 | ||||
| -rw-r--r-- | src/cpu/intel/fsp_model_406dx/microcode_size.h | 7 |
4 files changed, 10 insertions, 8 deletions
diff --git a/src/cpu/intel/fsp_model_406dx/Kconfig b/src/cpu/intel/fsp_model_406dx/Kconfig index 11a92a00fe..5cd4c656e5 100644 --- a/src/cpu/intel/fsp_model_406dx/Kconfig +++ b/src/cpu/intel/fsp_model_406dx/Kconfig @@ -62,12 +62,6 @@ config CPU_MICROCODE_CBFS_LOC depends on SUPPORT_CPU_UCODE_IN_CBFS default 0xfff60040 -config CPU_MICROCODE_CBFS_LEN - hex - depends on SUPPORT_CPU_UCODE_IN_CBFS - default 0x14400 if FSP_MODEL_406DX_A1 - default 0x14800 if FSP_MODEL_406DX_B0 - config MICROCODE_INCLUDE_PATH string "Location of the intel microcode patches" default "../intel/cpu/rangeley/microcode" diff --git a/src/cpu/intel/fsp_model_406dx/Makefile.inc b/src/cpu/intel/fsp_model_406dx/Makefile.inc index 767cc20c17..e1b814dfea 100644 --- a/src/cpu/intel/fsp_model_406dx/Makefile.inc +++ b/src/cpu/intel/fsp_model_406dx/Makefile.inc @@ -23,6 +23,7 @@ subdirs-y += ../../x86/name ramstage-y += acpi.c cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c +CPPFLAGS_romstage += -I$(src)/cpu/intel/fsp_model_406dx ifneq ($(CONFIG_MICROCODE_INCLUDE_PATH),) ifneq ($(wildcard $(shell readlink -f "$(top)/$(CONFIG_MICROCODE_INCLUDE_PATH)")),) diff --git a/src/cpu/intel/fsp_model_406dx/microcode_blob.c b/src/cpu/intel/fsp_model_406dx/microcode_blob.c index a4b7d421f5..74fe76c92c 100644 --- a/src/cpu/intel/fsp_model_406dx/microcode_blob.c +++ b/src/cpu/intel/fsp_model_406dx/microcode_blob.c @@ -20,10 +20,10 @@ unsigned microcode[] = { #if IS_ENABLED(CONFIG_FSP_MODEL_406DX_A1) - /* Size is 0x14400 */ + /* Size is 0x14400 - update in microcode_size.h when the file changes */ #include <microcode-m01406d000e.h> #elif IS_ENABLED(CONFIG_FSP_MODEL_406DX_B0) - /* Size is 0x14800 */ + /* Size is 0x14800 - update in microcode_size.h when the file changes */ #include <microcode-m01406d811d.h> #endif }; diff --git a/src/cpu/intel/fsp_model_406dx/microcode_size.h b/src/cpu/intel/fsp_model_406dx/microcode_size.h new file mode 100644 index 0000000000..b638ae5627 --- /dev/null +++ b/src/cpu/intel/fsp_model_406dx/microcode_size.h @@ -0,0 +1,7 @@ +/* Maximum size of the area that the FSP will search for the correct microcode */ + +#if IS_ENABLED(CONFIG_FSP_MODEL_406DX_A1) + #define MICROCODE_REGION_LENGTH 0x14400 +#elif IS_ENABLED(CONFIG_FSP_MODEL_406DX_B0) + #define MICROCODE_REGION_LENGTH 0x14800 +#endif |