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| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-01-21 18:12:07 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-01-24 13:40:39 +0000 |
| commit | 7701376cca585247dfec696cc5580f00f6b4dea6 (patch) | |
| tree | 4ae891c34c905f3e5b4ebccbb50ba8aa8c68b1d0 /src/cpu/intel/fsp_model_406dx | |
| parent | 7e6946a74c714ff109c35d97001b22c9e868aaea (diff) | |
cpu/intel/model_406dx: Remove the notion of CPU sockets
Change-Id: I5e8fb2e7331d02224a4199c4d05f92c603c57f78
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/31032
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/intel/fsp_model_406dx')
| -rw-r--r-- | src/cpu/intel/fsp_model_406dx/Kconfig | 1 | ||||
| -rw-r--r-- | src/cpu/intel/fsp_model_406dx/Makefile.inc | 8 |
2 files changed, 9 insertions, 0 deletions
diff --git a/src/cpu/intel/fsp_model_406dx/Kconfig b/src/cpu/intel/fsp_model_406dx/Kconfig index 79658f9817..f40842fce8 100644 --- a/src/cpu/intel/fsp_model_406dx/Kconfig +++ b/src/cpu/intel/fsp_model_406dx/Kconfig @@ -26,6 +26,7 @@ config CPU_SPECIFIC_OPTIONS select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 select SMP + select MMX select SSE2 select UDELAY_LAPIC select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/fsp_model_406dx/Makefile.inc b/src/cpu/intel/fsp_model_406dx/Makefile.inc index 26f46337e0..97bb981a66 100644 --- a/src/cpu/intel/fsp_model_406dx/Makefile.inc +++ b/src/cpu/intel/fsp_model_406dx/Makefile.inc @@ -17,6 +17,14 @@ ramstage-y += model_406dx_init.c subdirs-y += ../../x86/name subdirs-y += ../common +subdirs-y += ../../x86/tsc +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/lapic +subdirs-y += ../../x86/cache +subdirs-y += ../../x86/smm +subdirs-y += ../microcode +subdirs-y += ../turbo + ramstage-y += acpi.c CPPFLAGS_romstage += -I$(src)/cpu/intel/fsp_model_406dx |