diff options
| author | Martin Roth <gaumless@gmail.com> | 2014-05-21 13:40:21 -0600 |
|---|---|---|
| committer | Martin Roth <gaumless@gmail.com> | 2014-07-30 18:59:35 +0200 |
| commit | 09670265b63184f92d78fc8fe5311f3662cc528a (patch) | |
| tree | ffb44c4126b20845c4f202bb342c7f6d160bdf25 /src/cpu/intel/fsp_model_406dx/chip.h | |
| parent | ddf54b1c8b2ef6e8e3d2a673e0dd1ab43c7edc2c (diff) | |
cpu/intel: Add fsp version of model 406dx (Rangeley / Atom C2000)
This adds the CPU initialization pieces for Intel's Atom C2000 processor
(Formerly Rangeley).
Change-Id: I77d69f42c959bbc294784f044b7b0dcc2e30f30c
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: http://review.coreboot.org/6368
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/cpu/intel/fsp_model_406dx/chip.h')
| -rw-r--r-- | src/cpu/intel/fsp_model_406dx/chip.h | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/src/cpu/intel/fsp_model_406dx/chip.h b/src/cpu/intel/fsp_model_406dx/chip.h new file mode 100644 index 0000000000..90d32d37da --- /dev/null +++ b/src/cpu/intel/fsp_model_406dx/chip.h @@ -0,0 +1,33 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 The Chromium OS Authors. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* Magic value used to locate this chip in the device tree */ +#define SPEEDSTEP_APIC_MAGIC 0xACAC + +struct cpu_intel_fsp_model_406dx_config { + u8 pstate_coord_type; /* Processor Coordination Type */ + + int c1_battery; /* ACPI C1 on Battery Power */ + int c2_battery; /* ACPI C2 on Battery Power */ + int c3_battery; /* ACPI C3 on Battery Power */ + + int c1_acpower; /* ACPI C1 on AC Power */ + int c2_acpower; /* ACPI C2 on AC Power */ + int c3_acpower; /* ACPI C3 on AC Power */ +}; |