diff options
author | Martin Roth <martin.roth@se-eng.com> | 2014-12-04 18:06:36 -0700 |
---|---|---|
committer | Martin Roth <gaumless@gmail.com> | 2014-12-05 21:40:12 +0100 |
commit | e10108a6691c804f4b917be9a25bc8af3d7cc6a1 (patch) | |
tree | 80c07347eb12374db8877b4ed3b157a6190b37cf /src/cpu/intel/fsp_model_206ax | |
parent | db3e2f0931a52bee6e59d09df572fd0bfb481ff9 (diff) |
FSP platform microcode: Update to remove Kconfig variable
Move the Kconfig variable into a .h file - this does not need to be
in Kconfig.
Change-Id: I1db20790ddb32e0eb082503c6c60cbbefa818bb9
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/7646
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/cpu/intel/fsp_model_206ax')
-rw-r--r-- | src/cpu/intel/fsp_model_206ax/Kconfig | 6 | ||||
-rw-r--r-- | src/cpu/intel/fsp_model_206ax/Makefile.inc | 1 | ||||
-rw-r--r-- | src/cpu/intel/fsp_model_206ax/microcode_blob.h | 4 | ||||
-rw-r--r-- | src/cpu/intel/fsp_model_206ax/microcode_size.h | 7 |
4 files changed, 10 insertions, 8 deletions
diff --git a/src/cpu/intel/fsp_model_206ax/Kconfig b/src/cpu/intel/fsp_model_206ax/Kconfig index 043320cbe9..c05b12b9ca 100644 --- a/src/cpu/intel/fsp_model_206ax/Kconfig +++ b/src/cpu/intel/fsp_model_206ax/Kconfig @@ -58,12 +58,6 @@ config CPU_MICROCODE_CBFS_LOC depends on SUPPORT_CPU_UCODE_IN_CBFS default 0xfff70000 -config CPU_MICROCODE_CBFS_LEN - hex - depends on SUPPORT_CPU_UCODE_IN_CBFS - default 0xC000 if CPU_INTEL_FSP_MODEL_306AX - default 0x2800 if CPU_INTEL_FSP_MODEL_206AX - config MICROCODE_INCLUDE_PATH string "Location of the intel microcode patches" default "../intel/cpu/ivybridge/microcode" if CPU_INTEL_FSP_MODEL_306AX diff --git a/src/cpu/intel/fsp_model_206ax/Makefile.inc b/src/cpu/intel/fsp_model_206ax/Makefile.inc index e3d3ca5fb4..577d44e430 100644 --- a/src/cpu/intel/fsp_model_206ax/Makefile.inc +++ b/src/cpu/intel/fsp_model_206ax/Makefile.inc @@ -6,6 +6,7 @@ ramstage-y += acpi.c smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c +CPPFLAGS_romstage += -I$(src)/cpu/intel/fsp_model_206ax ifneq ($(CONFIG_MICROCODE_INCLUDE_PATH),) ifneq ($(wildcard $(shell readlink -f "$(top)/$(CONFIG_MICROCODE_INCLUDE_PATH)")),) diff --git a/src/cpu/intel/fsp_model_206ax/microcode_blob.h b/src/cpu/intel/fsp_model_206ax/microcode_blob.h index e56bef17a6..6a3eaafbbe 100644 --- a/src/cpu/intel/fsp_model_206ax/microcode_blob.h +++ b/src/cpu/intel/fsp_model_206ax/microcode_blob.h @@ -19,12 +19,12 @@ */ #if IS_ENABLED(CONFIG_CPU_INTEL_FSP_MODEL_206AX) - /* Size is 0x2800 - Update in Kconfigs when any included file changes*/ + /* Size is 0x2800 - Update in microcode_size.h when any included file changes*/ #include <microcode-m12206a7_00000029.h> #endif #if IS_ENABLED(CONFIG_CPU_INTEL_FSP_MODEL_306AX) - /* Size is 0xC000 - Update in Kconfigs when any included file changes*/ + /* Size is 0xC000 - Update in microcode_size.h when any included file changes*/ #include <microcode-m12306a2_00000008.h> #include <microcode-m12306a4_00000007.h> #include <microcode-m12306a5_00000007.h> diff --git a/src/cpu/intel/fsp_model_206ax/microcode_size.h b/src/cpu/intel/fsp_model_206ax/microcode_size.h new file mode 100644 index 0000000000..0b0364c127 --- /dev/null +++ b/src/cpu/intel/fsp_model_206ax/microcode_size.h @@ -0,0 +1,7 @@ +/* Maximum size of the area that the FSP will search for the correct microcode */ + +#if IS_ENABLED(CONFIG_CPU_INTEL_FSP_MODEL_306AX) + #define MICROCODE_REGION_LENGTH 0xC000 +#elif IS_ENABLED(CONFIG_CPU_INTEL_FSP_MODEL_206AX) + #define MICROCODE_REGION_LENGTH 0x2800 +#endif |