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| author | Jeremy Compostella <jeremy.compostella@intel.com> | 2023-12-20 08:18:20 -0800 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2023-12-22 12:26:42 +0000 |
| commit | 1cf942c18f893f9a2bb6eadbfb867b8ad0e68dbd (patch) | |
| tree | 44b0ad8a0d225f319cdc32c7e0727edc79917b0e /src/cpu/intel/common/Kconfig | |
| parent | 6fb386b93912c1431d70f9a72eb311ba730850c6 (diff) | |
Revert "cpu/intel/common: Define build time physical address reserved bits"
This reverts commit 6dff1fd7d5e419b2f947f516551dcab3f4ebe30a.
BUG=b:314886709
Change-Id: Ic63c93cb15d2998e13d49a872f32d425237f528b
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79663
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/cpu/intel/common/Kconfig')
| -rw-r--r-- | src/cpu/intel/common/Kconfig | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/src/cpu/intel/common/Kconfig b/src/cpu/intel/common/Kconfig index 0f6bd6879a..51b8ccb83f 100644 --- a/src/cpu/intel/common/Kconfig +++ b/src/cpu/intel/common/Kconfig @@ -31,14 +31,6 @@ config SET_MSR_AESNI_LOCK_BIT config CPU_INTEL_COMMON_TIMEBASE bool -config CPU_INTEL_COMMON_RESERVED_PHYS_ADDR_BITS - int - help - Specify the number of physical address reserved bits. This - config can be set for SoCs with reserved bits which cannot - be probed at runtime. A runtime detection by hardware - probing will be attempted if the value is -1. - endif config CPU_INTEL_COMMON_VOLTAGE |