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authorAaron Durbin <adurbin@chromium.org>2016-07-19 17:39:05 -0500
committerAaron Durbin <adurbin@chromium.org>2016-07-21 15:57:16 +0200
commitede69f0d627bb7546bff4e6b640e86b641d2ca15 (patch)
treeaccaf70964846c0cea025a44f8cbfd4a1a9fdf37 /src/cpu/intel/car/cache_as_ram.inc
parent150f476c966eb09eeb2c4c57769415f7cc15b768 (diff)
mainboard/google/reef: reverse the memory config bits
I mistakenly assumed the order of the bits matched how one would assign values as they wrote them msb .. lsb. However, the gpio lib doesn't do that. Correct the order so that values are read out correctly. BUG=chrome-os-partner:54949t Change-Id: I5304dfe2ba6f8eb073acab3377327167573ec2cc Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/15753 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/cpu/intel/car/cache_as_ram.inc')
0 files changed, 0 insertions, 0 deletions